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74VCX16374
LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS
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3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED : tPD = 3.0 ns (MAX.) at VCC = 3.0 to 3.6V tPD = 3.4 ns (MAX.) at VCC = 2.3 to 2.7V tPD = 6.8 ns (MAX.) at VCC = 1.8V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3.0V |IOH| = IOL = 18mA (MIN) at VCC = 2.3V |IOH| = IOL = 6mA (MIN) at VCC = 1.8V OPERATING VOLTAGE RANGE: VCC(OPR) = 1.8V to 3.6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 16374 LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17) ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V
TSSOP
ORDER CODES
PACKAGE TSSOP TUBE T&R 74VCX16374TTR
PIN CONNECTION
DESCRIPTION The 74VCX16374 is a low voltage CMOS 16 BIT D-TYPE FLIP-FLOP with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.8 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs. These 16 bit D-TYPE flip-flops are controlled by two clock inputs (nCK) and two output enable inputs (nOE). On the positive transition of the (nCK), the nQ outputs will be set to the logic state that were setup at the nD inputs. While the (nOE) input is low, the 8 outputs (nQ) will be in a normal state (HIGH or LOW logic level) and while high level the outputs will be in a high impedance state. Any output control does not affect the internal operation of flip flops; that is, the old data can be retained or the new data can be entered even while the outputs are off. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
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74VCX16374
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No 1 SYMBOL 1OE NAME AND FUNCTION
IEC LOGIC SYMBOLS
3 State Output Enable Input (Active LOW) 2, 3, 5, 6, 8, 9, 1Q0 to 1Q7 3-State Outputs 11, 12 13, 14, 16, 17, 2Q0 to 2Q7 3-State Outputs 19, 20, 22, 23 24 2OE 3 State Output Enable Input (Active LOW) 25 2CK Clock Input 36, 35, 33, 32, 2D0 to 2D7 Data Inputs 30, 29, 27, 26 47, 46, 44, 43, 1D0 to 1D7 Data Inputs 41, 40, 38, 37 48 1CK Clock Input 4, 10, 15, 21, GND Ground (0V) 28, 34, 39, 45 7, 18, 31, 42 VCC Positive Supply Voltage
TRUTH TABLE
INPUTS OE H L L L
X : Don`t Care Z : High Impedance
OUTPUT D X X L H Q Z NO CHANGE* L H
CK X
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LOGIC DIAGRAM
This logic diagram has not to be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage (OFF State) DC Output Voltage (High or Low State) (note 1) DC Input Diode Current DC Output Diode Current (note 2) DC Output Current Parameter Value -0.5 to +4.6 -0.5 to +4.6 -0.5 to +4.6 -0.5 to VCC + 0.5 - 50 - 50 50 100 400 -65 to +150 300 Unit V V V V mA mA mA mA mW C C
ICC or IGND DC VCC or Ground Current per Supply Pin Power Dissipation PD Tstg TL Storage Temperature Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) IO absolute maximum rating must be observed 2) VO < GND, VO > VCC
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO VO IOH, IOL IOH, IOL IOH, IOL Top dt/dv Supply Voltage Input Voltage Output Voltage (OFF State) Output Voltage (High or Low State) High or Low Level Output Current (VCC = 3.0 to 3.6V) High or Low Level Output Current (VCC = 2.3 to 2.7V) High or Low Level Output Current (VCC = 1.8V) Operating Temperature Input Rise and Fall Time (note 1) Parameter Value 1.8 to 3.6 -0.3 to 3.6 0 to 3.6 0 to VCC 24 18 6 -55 to 125 0 to 10 Unit V V V V mA mA mA C ns/V
1) VIN from 0.8V to 2V at VCC = 3.0V
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74VCX16374
DC SPECIFICATIONS (2.7V < VCC < 3.6V unless otherwise specified)
Test Condition Symbol Parameter VCC (V) -40 to 85 C Min. 2.0 2.7 to 3.6 0.8 2.7 to 3.6 2.7 3.0 VOL Low Level Output Voltage 2.7 to 3.6 2.7 3.0 II Ioff IOZ Input Leakage Current Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current ICC incr. per Input 2.7 to 3.6 0 2.7 to 3.6 IO=-100 A IO=-12 mA IO=-18 mA IO=-24 mA IO=100 A IO=12 mA IO=18 mA IO=24 mA VI = 0 to 3.6V VI or VO = 0 to 3.6V VI = VIH or VIL VO = 0 to 3.6V VI = VCC or GND VI or VO = VCC to 3.6V VIH = VCC - 0.6V VCC-0.2 2.2 2.4 2.2 0.2 0.4 0.4 0.55 5 10 10 20 20 750 VCC-0.2 2.2 2.4 2.2 0.2 0.4 0.4 0.55 5 10 10 20 20 750 A A A A A V V 0.8 Max. Value -55 to 125 C Min. 2.0 V Max. Unit
VIH VIL VOH
High Level Input Voltage Low Level Input Voltage High Level Output Voltage
ICC
2.7 to 3.6 2.7 to 3.6
ICC
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74VCX16374
DC SPECIFICATIONS (2.3V < VCC < 2.7V unless otherwise specified)
Test Condition Symbol Parameter VCC (V) -40 to 85 C Min. 1.6 2.3 to 2.7 0.7 2.3 to 2.7 2.3 VOL Low Level Output Voltage 2.3 to 2.7 2.3 II Ioff IOZ Input Leakage Current Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current 2.3 to 2.7 0 2.3 to 2.7 IO=-100 A IO=-6 mA IO=-12 mA IO=-18 mA IO=100 A IO=12 mA IO=18 mA VI = 0 to 3.6V VI or VO = 0 to 3.6V VI = VIH or VIL VO = 0 to 3.6V VI = VCC or GND 2.3 to 2.7 VI or VO = VCC to 3.6V VCC-0.2 2.0 1.8 1.7 0.2 0.4 0.6 5 10 10 20 20 VCC-0.2 2.0 1.8 1.7 0.2 0.4 0.6 5 10 10 20 20 A A A A V V 0.7 Max. Value -55 to 125 C Min. 1.6 V Max. Unit
VIH VIL VOH
High Level Input Voltage Low Level Input Voltage High Level Output Voltage
ICC
DC SPECIFICATIONS (1.8V < VCC < 2.3V unless otherwise specified)
Test Condition Symbol Parameter VCC (V) -40 to 85 C Min. 0.7 VCC 1.8 to 2.3 0.2 VCC 1.8 1.8 1.8 0 1.8 IO=-100 A IO=-6 mA IO=100 A IO=6 mA VI = 0 to 3.6V VI or VO = 0 to 3.6V VI = VIH or VIL VO = 0 to 3.6V VI = VCC or GND VI or VO = VCC to 3.6V VCC-0.2 1.4 0.2 0.3 5 10 10 20 20 VCC-0.2 1.4 0.2 0.3 5 10 10 20 20 A 0.2 VCC V V V A A A Max. Value -55 to 125 C Min. 0.7 VCC Max. V Unit
VIH VIL VOH VOL II Ioff IOZ
High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current
ICC
1.8
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74VCX16374
DYNAMIC SWITCHING CHARACTERISTICS (Ta = 25C, Input tr = tf = 2.0ns, CL = 30pF, RL = 500)
Test Condition Symbol Parameter VCC (V) 1.8 2.5 3.3 1.8 2.5 3.3 1.8 2.5 3.3 VIL = 0V VIH = VCC VIL = 0V VIH = VCC VIL = 0V VIH = VCC Value TA = 25 C Min. Typ. 0.25 0.6 0.8 -0.25 -0.6 -0.8 1.5 1.9 2.2 Max. V Unit
VOLP
Dynamic Low Voltage Quiet Output (note 1, 3) Dynamic Low Voltage Quiet Output (note 1, 3) Dynamic High Voltage Quiet Output (note 2, 3)
VOLV
V
VOHV
V
1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state. 2) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the HIGH state. 3) Parameters guaranteed by design.
AC ELECTRICAL CHARACTERISTICS (CL = 30pF, RL = 500, Input tr = tf = 2.0ns)
Test Condition Symbol Parameter VCC (V) 1.8 2.3 to 2.7 3.0 to 3.6 1.8 2.3 to 2.7 3.0 to 3.6 1.8 2.3 to 2.7 3.0 to 3.6 1.8 2.3 to 2.7 3.0 to 3.6 1.8 2.3 to 2.7 3.0 to 3.6 1.8 2.3 to 2.7 3.0 to 3.6 1.8 2.3 to 2.7 3.0 to 3.6 1.8 2.3 to 2.7 3.0 to 3.6 -40 to 85 C Min. 1.5 1.0 0.8 1.5 1.0 0.8 1.5 1.0 0.8 2.5 1.5 1.5 1.0 1.0 1.0 4.0 1.5 1.5 125 200 250 Max. 6.8 3.4 3.0 9.2 4.6 3.5 6.8 3.8 3.5 Value -55 to 125 C Min. 1.5 1.0 0.8 1.5 1.0 0.8 1.5 1.0 0.8 2.5 1.5 1.5 1.0 1.0 1.0 4.0 1.5 1.5 110 190 235 Max. 8.0 4.3 4.1 10.6 6.0 5.4 8.0 4.7 4.2 ns Unit
tPLH tPHL
Propagation Delay Time CK to Qn Output Enable Time
tPZL tPZH
ns
tPLZ tPHZ
Output Disable Time
ns
ts
Setup TIme, HIGH or LOW level Dn to CK Hold Time High or LOW level Dn to CK CK Pulse Width, HIGH Clock Pulse Frequency
ns
th
ns
tw
ns
fMAX
MHz 0.75 0.5 0.5
tOSLH tOSHL Output To Output Skew Time (note1, 2)
0.75 0.5 0.5
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|) 2) Parameter guaranteed by design
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74VCX16374
CAPACITIVE CHARACTERISTICS
Test Condition Symbol Parameter VCC (V) 1.8, 2.5 or 3.3 1.8, 2.5 or 3.3 1.8, 2.5 or 3.3 VIN = 0 or VCC VIN = 0 or VCC fIN = 10MHz VIN = 0 or VCC Value TA = 25 C Min. Typ. 6 7 20 Max. pF pF pF Unit
CIN COUT CPD
Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1)
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per circuit)
TEST CIRCUIT
TEST tPLH, tPHL tPZL, tPLZ (VCC = 3.0 to 3.6V) tPZL, tPLZ (VCC = 2.3 to 2.7V or 1.8V) tPZH, tPHZ
CL = 30 pF or equivalent (includes jig and probe capacitance) RL = R1 = 500 or equivalent RT = ZOUT of pulse generator (typically 50)
SWITCH Open 6V 2VCC GND
WAVEFORM SYMBOL VALUES
Symbol 3.0 to3.6V VIH VM VX VY 2.7V 1.5V VOL + 0.3V VOH - 0.3V VCC 2.3 to 2.7V VCC VCC/2 VOL + 0.15V VOH - 0.15V 1.8V VCC VCC/2 VOL + 0.15V VOH - 0.15V
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74VCX16374
WAVEFORM 1: nCK TO Qn PROPAGATION DELAYS, nCK MAXIMUM FREQUENCY, Dn TO nCK SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
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74VCX16374
WAVEFORM 3 : nCK MINIMUM PULSE WIDTH (f=1MHz; 50% duty cycle)
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74VCX16374
TSSOP48 MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.50 6.0 0.5 BSC 8 0.75 0 0.020 0.17 0.09 12.4 8.1 BSC 6.2 0.236 0.0197 BSC 8 0.030 0.05 0.9 0.27 0.20 12.6 0.0067 0.0035 0.488 0.318 BSC 0.244 TYP MAX. 1.2 0.15 0.002 0.035 0.011 0.0079 0.496 MIN. TYP. MAX. 0.047 0.006 inch
A
A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
7065588C
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74VCX16374
Tape & Reel TSSOP48 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 8.7 13.1 1.5 3.9 11.9 12.8 20.2 60 30.4 8.9 13.3 1.7 4.1 12.1 0.343 0.516 0.059 0.153 0.468 TYP MAX. 330 13.2 0.504 0.795 2.362 1.197 0.350 0.524 0.067 0.161 0.476 MIN. TYP. MAX. 12.992 0.519 inch
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74VCX16374
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com
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